A wide variety of semiconductor packages having integrated circuits (IC) are used in industry. In general, ICs and their packages have been becoming more complex over time, with the result that their power, speed and their size has been increasing. With increased size and complexity also arise an increased number of connections from the integrated circuit to the larger electronics assembly of which it is a part. Historically, pin counts of Very Large Scale Integrated (VLSI) circuits exceeded the limits for dual in-line packaging (DIPs), leading to development of the Pin Grid Array (PGA). In the PGA the inputs and outputs of the integrated circuit are connected to an integrated circuit package in which pins are arranged in a square array that may or may not cover the bottom of the package. The pins conduct electrical signals from the integrated circuit to the printed circuit board (PCB) in which the IC package is mounted. A subsequent development is that of the Ball Grid Array, or BGA, in with the pins are replaced by balls of solder affixed to the bottom of the integrated circuit package. During assembly to the printed circuit board, the BGA is heated, causing the solder balls to melt and solder the package to the printed circuit board.
As the BGA packaging offers additional advantages, such as improved heat conduction due to the lower thermal resistance between the package and PCB, a lower inductance connection than pins, and reduced solder connection bridging; it has become a preferred packaging type.
One disadvantage of BGAs however, is the requirement for flatness during processing. In general, the solder connections require a tight mechanical tolerancing during processing in order to preclude mechanical stresses which would promote solder joint failure.
Working against this requirement, however, is the difference in thermal coefficient of expansion which exists between the substrate upon which the solder balls are mounted, and the silicon integrated circuit mounted upon the substrate. The differences in the thermal coefficient of expansion lead to warpage of the BGA package as a whole. This warpage, which for the purposes of this specification refers to a bending or twist or general lack of flatness in the overall integrated circuit package, including in particular the plane formed by the solder joint locations, can cause a variety of problems. A non-exhaustive list by way of example includes problems such as fractured solder joints, open contact solder joints, pillowed joints, or intermittent contact solder joints.
The problem of warpage is exacerbated by larger package sizes, and by elevated processing temperatures. As trends in integrated circuit complexity are consistently in the direction of larger package sizes, and as production changes in the direction of lead free solders yield higher processing temperatures, the problem of integrated circuit warpage is a pressing one. It is important to note that the desired tolerance for flatness at and across the processing temperature range can be very high. For example, for BGA packages having a size of greater than 1″ across, there may be a maximum warpage tolerance of on the order of 0.008″ allowed.
One prior solution to the problem of IC package warping has been the incorporation on top of the IC of a flat stiffener plate. The stiffener plate takes the form essentially of a completely flat entirely planar item having a constant thickness, and is a simple rectangle having approximately its perimeter be the size of the IC package perimeter when viewed from the top. A central region of the flat stiffener plate may be cut out in certain applications, for example to allow access of a thermally conductive element.
However, these stiffener flat plates suffer from the disadvantage that they themselves are entirely flat, and thus, have a somewhat limited resistance to warping due to temperature change or torsion or bending forces. In order to make a flat plate strong enough to provide desirable resistance to warping in the overall IC package, it can be necessary to make the stiffening plate undesirably thick. It is undesirable for the stiffening plate, which rests on top of the IC, to be too thick because the thick stiffening plate, on top of and added to the IC thickness, causes the entire assembled IC package to be thick, thus potentially limiting IC packaging placement options and/or increasing printed circuit card to printed circuit card separation in the final system assembly.
Further, the added stiffener thickness increases the IC die-to-lid spacing, thereby creating a larger separation that needs to be filled with thermal interface material, the longer thermal path ultimately impeding thermal dissipation from the IC. Moreover, because of the stiffener's entirely flat cross-sectional profile, increased stiffness is achieved inefficiently though the increase of the overall volume of material, thus adding additional cost and weight to the final IC package.
In view of the foregoing, it would be desireable to provide a means of decreasing warpage of IC packages. In particular, it would be desirable to provide a means that can provide improved performance and/or mounting reliability while providing a desirable low degree of thickness and/or a desirable low amount of material.